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[招聘] IC Engineer,F(xiàn)PGA Design - 源見科技
時間:2008/6/20 19:36:32    發(fā)布:源見科技公司

源見科技(VisionFlow, Inc.)是一家視頻技術(shù)研發(fā)公司, 注冊于美國特拉華州, 總部設在奧斯汀德克薩斯州,源見科技于2005年在中國成立了蘇州和上海設計中心。公司致力于開發(fā)低功耗,高性能的視頻處理器,滿足目前移動視頻和網(wǎng)際視頻市場應用的需求。


Sr. IC Verification Engineer/IC Verification Engineer( New )

Job Responsibilities:
-Be responsible for setting up and maintaining the simulation environment
-Develop tests to verify design functionality.
-Be responsible for making ATE function pattern,etc
Job Requirements:
-A Bachelor degree in Electrical Engineering (A Master or Ph.D. degree is a plus)
-2+ years IC working experience
-Good knowledge of IC design flow
-Familiar with AMBA?lt;br>-Must be proficient in verilog
-Well experienced in 32-bit SOC design.
-Strong scripting skills required, Perl/TCL/sed/awk
-Strong background with Verification methodologies.
-Good written and spoken English
-Excellent background in both hardware and software design.
-Good communication skills and able to work both independently and in a team


Sr. System Hardware/Application Engineer( New )

Job Responsibilities:
- Develop system Level reference design/demo-board/turn-key solution with technical intelligence
- Debug and test on PCB board with chip design engineer.
- Interface with PCB manufacturing.
- Provide technical support and training to customers
Job Requirements:
- Demonstrated working experience on system hardware design. Video system is prefered.
- Proven ability to perform system reference/evaluation board design, including PCB Schematic and Layout design.
- Proven debugging skills using oscilloscope and logic analyzer
- Highly motivated, well organized, and quick learning and problem solving skills;
- Able to work both independently and as part of team, good communication skills.


Sr. FPGA Design/Verification Engineer( New )

Job Responsibilities:
FPGA partition, validation,and testing on board.
System emulation and bring-up on FPGA prototype.
Job Requirements:
- Minimu 2 years of FPGA design/verification experience
- Know well about the Verilog/VHDL RTL design
- Good knowledge of Xilinx FPGA/CPLD
- Strong experience on system board-level verification/testing.
- Good written and spoken English

Contact:
E-mail:hr@visionflow.com.cn
Phone:0512-62885306
http://www.visionflow.com.cn/cn/career.php

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